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21st IEEE VLSI Test Symposium
BIST RESEEDING WITH VERY FEW SEEDS
Napa Valley, California
April 27-May 01
ISBN: 0-7695-1924-5
Ahmad A. Al-Yamani, Stanford University
Subhasish Mitra, Intel Corporation
Edward J. McCluskey, Stanford University
Reseeding is used to improve fault coverage of pseudo-random testing. The seed corresponds to the initial state of the LFSR before filling the scan chain. The number of deterministic seeds required is directly proportional to the tester storage or hardware overhead requirement. In this paper, we present an algorithm for seed ordering to minimize the number of seeds required to cover a set of deterministic test patterns. Our technique is applicable whether seeds are loaded from the tester or encoded on chip. Simulations show that, when compared to random ordering, the technique reduces seed storage or hardware overhead by up to 80%. The seeds we use are deterministic so 100% SSF fault coverage can be achieved. Also, the technique we present is fault-model independent.
Citation:
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey, "BIST RESEEDING WITH VERY FEW SEEDS," vts, pp.69, 21st IEEE VLSI Test Symposium, 2003
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