I.T. Sylla, M. Slamani, B. Kaminska, F.M. Hossein, P. Vincent, "11.2 Impedance Mismatch and Lumped Capacitance Effects in High Frequency Testing," VLSI Test Symposium, IEEE, pp. 239, 16th IEEE VLSI Test Symposium, 1998.

@article{ 10.1109/VTEST.1998.670875,
author = {I.T. Sylla and M. Slamani and B. Kaminska and F.M. Hossein and P. Vincent},
title = {11.2 Impedance Mismatch and Lumped Capacitance Effects in High Frequency Testing},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1998},
issn = {1093-0167},
pages = {239},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1998.670875},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - VLSI Test Symposium, IEEE
TI - 11.2 Impedance Mismatch and Lumped Capacitance Effects in High Frequency Testing
SN - 1093-0167
SP
EP
A1 - I.T. Sylla,
A1 - M. Slamani,
A1 - B. Kaminska,
A1 - F.M. Hossein,
A1 - P. Vincent,
PY - 1998
VL - 0
JA - VLSI Test Symposium, IEEE
ER -