15th IEEE VLSI Test Symposium (VTS'97) Functional test pattern generation for CMOS operational amplifier Monterey, California April 27-May 01 ISBN: 0-8186-7810-0
In this paper, the optimum functional patterns for CMOS operational amplifier are proposed based on an analysis to find the maximum difference between the good circuit and the faulty circuit for a CMOS operational amplifier. The theoretical and simulation results show that the derived test patterns do give the maximum difference at the output even when the circuit has a "soft" fault. The results have also been applied to generate test patterns for a programmable gain/loss mixed signal circuit.
Index Terms:
CMOS analogue integrated circuits; functional test pattern generation; CMOS operational amplifier; programmable gain/loss mixed signal circuit; op amp testing; IC testing
Citation:
Soon Jyh Chang, Chung Len Lee, Jwu E Chen, "Functional test pattern generation for CMOS operational amplifier," vts, pp.267, 15th IEEE VLSI Test Symposium (VTS'97), 1997 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||