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15th IEEE VLSI Test Symposium (VTS'97)
Bridges in sequential CMOS circuits: current-voltage signature
Monterey, California
April 27-May 01
ISBN: 0-8186-7810-0
ASCII Text
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R. Rodriguez-Montanes, J. Figueras, "Bridges in sequential CMOS circuits: current-voltage signature," VLSI Test Symposium, IEEE, pp. 68, 15th IEEE VLSI Test Symposium (VTS'97), 1997.
 
 
BibTex
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@article{ 10.1109/VTEST.1997.599443,
author = {R. Rodriguez-Montanes and J. Figueras},
title = {Bridges in sequential CMOS circuits: current-voltage signature},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1997},
isbn = {0-8186-7810-0},
pages = {68},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1997.599443},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Bridges in sequential CMOS circuits: current-voltage signature
SN - 0-8186-7810-0
SP
EP
A1 - R. Rodriguez-Montanes,
A1 - J. Figueras,
PY - 1997
KW - fault diagnosis; sequential CMOS circuits; bridging defects; current-voltage signature; I/sub DDQ/-V/sub DD/ signature; control loop nodes; fault diagnosis; temperature dependence
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
R. Rodriguez-Montanes, Dept. d'Enginyeria Electron., Univ. Politecnica de Catalunya, Barcelona, Spain
J. Figueras, Dept. d'Enginyeria Electron., Univ. Politecnica de Catalunya, Barcelona, Spain
The I/sub DDQ/-V/sub DD/ signature for sequential CMOS circuits with bridging defects is characterized. In combinational circuits with a bridging defect, an increase in V/sub DD/ results in a higher I/sub DDQ/ value flowing through the defect, however, the total current may decrease as it will be shown. In sequential circuits with bridging defects connecting control loop nodes, the V/sub DD/-I/sub DDQ/ signature may present intervals of constant non defective I/sub DDQ/ value. The signature may be used to diagnose certain types of bridging defects in sequential CMOS circuits.
Index Terms:
fault diagnosis; sequential CMOS circuits; bridging defects; current-voltage signature; I/sub DDQ/-V/sub DD/ signature; control loop nodes; fault diagnosis; temperature dependence
Citation:
R. Rodriguez-Montanes, J. Figueras, "Bridges in sequential CMOS circuits: current-voltage signature," vts, pp.68, 15th IEEE VLSI Test Symposium (VTS'97), 1997
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