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14th IEEE VLSI Test Symposium (VTS '96)
Iterative test-point selection for analog circuits
Princeton, NJ
April 28-May 01
ISBN: 0-8186-7304-4
ASCII Text
x 
 
J. Van Spaandonk, T.A.M. Kevenaar, "Iterative test-point selection for analog circuits," VLSI Test Symposium, IEEE, pp. 66, 14th IEEE VLSI Test Symposium (VTS '96), 1996.
 
 
BibTex
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@article{ 10.1109/VTEST.1996.510837,
author = {J. Van Spaandonk and T.A.M. Kevenaar},
title = {Iterative test-point selection for analog circuits},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1996},
isbn = {0-8186-7304-4},
pages = {66},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1996.510837},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Iterative test-point selection for analog circuits
SN - 0-8186-7304-4
SP
EP
A1 - J. Van Spaandonk,
A1 - T.A.M. Kevenaar,
PY - 1996
KW - analogue integrated circuits; integrated circuit testing; measurement errors; VLSI; iterative methods; iterative test-point selection; analog ICs; functional testing; decomposition technique; iterative algorithm; random measurement errors
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
J. Van Spaandonk, Eindhoven Univ. of Technol., Netherlands
T.A.M. Kevenaar, Eindhoven Univ. of Technol., Netherlands
A method is presented which is useful for functional testing of analog circuits. It selects a set of rest points from a large set of candidate test points by combining a well-known decomposition technique from linear algebra with an iterative algorithm. The influence of random measurement errors is taken into account. Examples demonstrate that the method allows the circuit behavior to be determined with high precision, even in the presence of large measurement errors.
Index Terms:
analogue integrated circuits; integrated circuit testing; measurement errors; VLSI; iterative methods; iterative test-point selection; analog ICs; functional testing; decomposition technique; iterative algorithm; random measurement errors
Citation:
J. Van Spaandonk, T.A.M. Kevenaar, "Iterative test-point selection for analog circuits," vts, pp.66, 14th IEEE VLSI Test Symposium (VTS '96), 1996
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