A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-?m CMOS

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	Similar Articles Articles by Shaikh K. Alam

20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)

Bangalore, India

January 06-January 10

ISBN: 0-7695-2762-0

	ASCII Text	x
	Shaikh K. Alam, "A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-?m CMOS," VLSI Design, International Conference on, pp. 146-154, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007.

	BibTex	x
	@article{ 10.1109/VLSID.2007.6, author = {Shaikh K. Alam}, title = {A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-?m CMOS}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2007}, issn = {1063-9667}, pages = {146-154}, doi = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.6}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-?m CMOS SN - 1063-9667 SP146 EP154 A1 - Shaikh K. Alam, PY - 2007 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Shaikh K. Alam, Ohio State University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.6

This paper describes a 1.5-V 2 GHz I/Q down conversion mixer for a WCDMA front-end receiver in a 0.18-?m CMOS process. The mixer achieves a conversion gain of 20.55 dB within 1-dB compression point (iCP1dB) of -9.2 dBm. It also achieves a double side band (DSB) noise figure (NF) of 8.96 dB. The mixer acquires the third order input referred intercept point (IIP3) of -0.54 dBm. The mixer consumes only 4.0 mA of current from a 1.5-V power supply.

Citation:

Shaikh K. Alam, "A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-?m CMOS," vlsid, pp.146-154, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007

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