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20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)
7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer
Bangalore, India
January 06-January 10
ISBN: 0-7695-2762-0
ASCII Text
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Debashis Mandal, T. K. Bhattacharyya, "7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer," VLSI Design, International Conference on, pp. 156-164, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007.
 
 
BibTex
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@article{ 10.1109/VLSID.2007.5,
author = {Debashis Mandal and T. K. Bhattacharyya},
title = {7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2007},
issn = {1063-9667},
pages = {156-164},
doi = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.5},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - 7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer
SN - 1063-9667
SP156
EP164
A1 - Debashis Mandal,
A1 - T. K. Bhattacharyya,
PY - 2007
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Debashis Mandal, IIT Kharagpur, India
T. K. Bhattacharyya, IIT Kharagpur, India
A fully-integrated, ZigBee standard complaint, frequency synthesizer in the frequency range of 2.4- 2.4835GHz with frequency resolution of 5MHz, is designed in 0.18 ?m epi-CMOS process and silicon performance is measured. Integer-N architecture is chosen for implementation. It consumes 7.95mW of power at 1.8V supply and core area is 0.75 x 0.65mm2. The measured phase-noises are -81.55dBc/Hz and -108.55dBc/Hz at 100kHz and 1MHz offset, respectively, with low settling time less than 25 us.
Citation:
Debashis Mandal, T. K. Bhattacharyya, "7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer," vlsid, pp.156-164, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007
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