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20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)
Architecture for Variable-Length Combined FFT, DCT, and MWT Transform Hardware for a Multi-ModeWireless System
Bangalore, India
January 06-January 10
ISBN: 0-7695-2762-0
Rohit Pandey, Rutgers University
Michael L. Bushnell, Rutgers University
We propose a novel combined wireless baseband processor architecture targeting the Fast Fourier Transform (FFT) for orthogonal frequency division multiplexing (OFDM), the discrete cosine transform (DCT) for video and audio compression, and the modified Walsh transform (MWT) for demodulation of the complementary code key (CCK) in the wireless standard 802.11b. The architecture is variable-length and is suitable for multi-mode and multi-standard OFDM communication systems such as 802.11a, digital audio broadcasting (DAB), digital video broadcasting-terrestrial (DVB-T), very-high-speed digital subscriber loop (VDSL), asymmetric digital subscriber loop (ADSL), and also for 802.11b. It also does joint photographic expert group (JPEG) and moving picture expert group (MPEG) texture en-/decoding. The combined architecture uses 42.5% fewer multipliers, and 35% fewer logic gates in the nonmultiplier hardware, than three individual cores. It has a signalto- noise-ratio (SNR) of 46.5dB with 8 input bits for a 1,024-size FFT. It saves 28.6% of the dynamic and 37% of the static power.
Citation:
Rohit Pandey, Michael L. Bushnell, "Architecture for Variable-Length Combined FFT, DCT, and MWT Transform Hardware for a Multi-ModeWireless System," vlsid, pp.121-126, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007
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