Performance of an application can be improved through augmenting the processor with Application specific Functional Units (AFUs). Usually a cluster of operations identified from the application forms the behavior of an AFU. Several researchers studied the impact of Input and Output (I/O) constraints for a legal operation cluster on the overall achievable speedup. The general observation is that the speedup potential grows with the relaxation of I/O constraints. Going further, in this paper, we investigate the speedup potential of AFUs in the absence of I/O constraints. Design challenge in the absence of I/O constraints is addressed in a very practical manner, through the identification of maximal convex subgraphs. Usually the available register ports are few but the number of inputs/outputs of the identified patterns are likely to be large. We solve the register port limitation by the design of distributed I/O functional units, in which the operands are communicated in multiple cycles. The experimental results show that selection of maximal clusters achieves average 50% higher speedup than selecting I/O constrained operation clusters. Also, our identification algorithm runs 2 to 3 orders faster than an exhaustive identification approach.