Dynamic CMOS logic in general and domino logic in particular has a number of advantages to design high speed and low power CMOS circuits. However, the main difficulty with domino logic is that it can implement only non-inverted logic. To implement inverted polarity it is required to duplicate several circuit parts using inverted polarities of inputs and hence increasing area and power dissipation. With static CMOS logic, on the other hand, it is simple to realize gate with both inverted and non-inverted logic unlike dynamic CMOS logic. In this paper, we propose a mixed approach, where it implements both static and dynamic CMOS logic styles in the same circuit eliminating intermediate inverter implementation of domino logic. Simulation results on ISCAS?85 benchmark circuits show that circuits based on our approach have on the average 34 % area and 32 % power improvement compared to circuits with only domino logic and on the average 26 % power and 38 % delay improvement compared to circuits with only static CMOS logic.