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20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)
On-Chip Voltage Down Converter Based on Moderate Inversion for Low- Power VLSI Chips
Bangalore, India
January 06-January 10
ISBN: 0-7695-2762-0
Qianneng Zhou, Harbin Institute of Technology, Harbin, China
Fengchang Lai, Harbin Institute of Technology, Harbin, China
Yongsheng Wang, Harbin Institute of Technology, Harbin, China
An on-chip differential-amplifier-based voltage down converter (VDC) is proposed. Employing a reference voltage generator, which operates in moderate inversion region, the architecture of the proposed VDC is simple and can be fabricated by conventional CMOS technology. VDC converts 3.3V to lower voltage so that the internal circuits of VLSI are used. In this paper, 1.8V is used as an experiment vehicle. The output voltage (Vout) of the VDC is stabilized within ?3.8mV for load current varying from 0 to 100mA and within ?0.75% for ?10% variation of external supply voltage. The temperature dependency of Vout is only 0.329mV/0C.
Citation:
Qianneng Zhou, Fengchang Lai, Yongsheng Wang, "On-Chip Voltage Down Converter Based on Moderate Inversion for Low- Power VLSI Chips," vlsid, pp.433-438, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007
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