loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)
On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology
Bangalore, India
January 06-January 10
ISBN: 0-7695-2762-0
ASCII Text
x 
 
Pradipta Patra, Amit Patra, D. Kastha, "On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology," VLSI Design, International Conference on, pp. 935-940, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007.
 
 
BibTex
x
 
@article{ 10.1109/VLSID.2007.119,
author = {Pradipta Patra and Amit Patra and D. Kastha},
title = {On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2007},
issn = {1063-9667},
pages = {935-940},
doi = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.119},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology
SN - 1063-9667
SP935
EP940
A1 - Pradipta Patra,
A1 - Amit Patra,
A1 - D. Kastha,
PY - 2007
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Pradipta Patra, Indian Institute of Technology, Kharagpur, India
Amit Patra, Indian Institute of Technology, Kharagpur, India
D. Kastha, Indian Institute of Technology, Kharagpur, India
This paper presents the chip design of a single inductor triple output buck converter with interleaved switched capacitor outputs with only the passive elements being off-chip. Transient overshoots occur in all the output voltages during load transients due to cross regulation effect amongst the coupled outputs. This has been minimized using a priority based novel control technique. The error amplifiers are designed accordingly. The dead band circuitry amongst the output switches have been optimally designed so that the power MOSFET's do not breakdown at the instance when all the output switches are momentarily turned OFF. Moreover, selection of the size of the power switches has been a significant contribution as their stray capacitances are used to hold the voltage across the power switches during dead band condition. The chip has been implemented on 1.5u process following DSL specifications. The post layout simulation results are presented in the paper and they all prove the stable operation of the circuit and the validation of the stated theories.
Citation:
Pradipta Patra, Amit Patra, D. Kastha, "On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology," vlsid, pp.935-940, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007
Usage of this product signifies your acceptance of the Terms of Use.