High Speed Robust Current Sense Amplifier for Nanoscale Memories:

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19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)

High Speed Robust Current Sense Amplifier for Nanoscale Memories: — A Winner Take All Approach

Hyderabad, India

January 03-January 07

ISBN: 0-7695-2502-4

	ASCII Text	x
	Srikanth Sundaram, Praveen Elakkumanan, Ramalingam Sridhar, "High Speed Robust Current Sense Amplifier for Nanoscale Memories: — A Winner Take All Approach," VLSI Design, International Conference on, pp. 569-574, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006.

	BibTex	x
	@article{ 10.1109/VLSID.2006.98, author = {Srikanth Sundaram and Praveen Elakkumanan and Ramalingam Sridhar}, title = {High Speed Robust Current Sense Amplifier for Nanoscale Memories: — A Winner Take All Approach}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2006}, issn = {1063-9667}, pages = {569-574}, doi = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.98}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - High Speed Robust Current Sense Amplifier for Nanoscale Memories: — A Winner Take All Approach SN - 1063-9667 SP569 EP574 A1 - Srikanth Sundaram, A1 - Praveen Elakkumanan, A1 - Ramalingam Sridhar, PY - 2006 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Srikanth Sundaram, State University of New York at Buffalo

Praveen Elakkumanan, State University of New York at Buffalo

Ramalingam Sridhar, State University of New York at Buffalo

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.98

The design of fast, low power and robust sense amplifier circuits is a challenge for nanoscale SRAMs due to the increasing bitline capacitance and process variations. Current sensing in SRAMs is promising to achieve high-speed operation in low-voltage application. In this paper, we propose a process variation tolerant, high performance and scalable current sense amplifier that uses a Winner Take All (WTA) approach for nanoscale SRAMs. Simulation of worst-case threshold voltage mismatch on our WTA sense amplifier shows that it could tolerate upto 10% variation in the threshold voltage, which is expected within die in a

Citation:

Srikanth Sundaram, Praveen Elakkumanan, Ramalingam Sridhar, "High Speed Robust Current Sense Amplifier for Nanoscale Memories: — A Winner Take All Approach," vlsid, pp.569-574, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006

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