loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)
Efficient Analog Performance Macromodeling via Sequential Design Space Decomposition
Hyderabad, India
January 03-January 07
ISBN: 0-7695-2502-4
Mengmeng Ding, University of Cincinnati
Ranga Vemuri, University of Cincinnati
This paper presents a sequential design space decomposition technique for efficient analog feasibility and performance macromodeling. The performance macromodel is composed of one feasibility classifier and a set of performance regression models. The algorithm sequentially decomposes the design space into smaller partitions. We use a heuristic to identify the regions of significance. Feasibility classifiers of high precision and recall are constructed with low modeling cost within these regions. The final feasibility model is essentially a set of feasibility classifiers, each of which is valid for a subspace of the design space. The performance regression models constructed with much lower training instances have higher accuracy compared to a previous approach.
Citation:
Mengmeng Ding, Ranga Vemuri, "Efficient Analog Performance Macromodeling via Sequential Design Space Decomposition," vlsid, pp.553-556, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
Usage of this product signifies your acceptance of the Terms of Use.