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19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)
Area and Power Efficient VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System
Hyderabad, India
January 03-January 07
ISBN: 0-7695-2502-4
Zahid Khan, University of Edinburgh
Tughrul Arslan, University of Edinburgh
John S. Thompson, University of Edinburgh
Ahmet T. Erdogan, University of Edinburgh
Weight and size are the bottlenecks of portable wireless systems which are in turn dependent on area and power consumption of electronic systems. The situation becomes even worse if wireless systems are equipped with Multiple Input and Multiple Output (MIMO) technology which involves highly complex signal processing. This paper proposes an area and power efficient VLSI architecture for computing the pseudo inverse of augmented channel matrix used in MIMO systems. Results indicate 25% area and 24% power reduction compared to previous architecture in the literature without degrading the BER performance.
Citation:
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahmet T. Erdogan, "Area and Power Efficient VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System," vlsid, pp.734-737, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
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