This paper presents a real-time filter scheme to facilitate the block buffering to reduce the power consumption without delay penalty. Our scheme consists of a new register design, called content-change-aware (CCA) register. By embedding the detection logic in the register, the CCA register is able to sense out the difference between the coming value and the current stored value. This property can be used to accurately filter out all the redundant accesses to the large storage in real-time. Applying the proposed CCA register to the TLB/cache with a single block buffer, the experimental results show that our design can dramatically reduce the average power consumption per TLB/cache access as achieved by using the block buffering, but without compromise of system performance.