As the design complexity increases, a detailed SPICE model cannot be used to study substrate noise injected by the digital logic into the analog circuit in a mixed-signal system. Hence a reduced yet accurate model is needed. Previous work [7] shows that the current drawn by the digital circuit from the power supply has a big impact on the substrate noise and therefore must be modeled accurately in the reduced model. In this paper, we propose an accurate current modeling technique based on pre-characterizing library modules for the current drawn from the power supply as a function of time, load capacitance, input transitions and slews. This technique is then embedded in both pattern-dependent (PDM) [3, 15] and pattern-independent (PIM) [7] substrate noise analysis methodologies. Results on several gate-level benchmarks show that the proposed scheme is, on average, within 4.5% of the detailed BSIM3-based model for PDM and within 12% for PIM. In contrast, the previously proposed scheme of [7] has an average discrepancy of 176% with the detailed model for PIM.