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19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)
Real Time Dynamic Receive Apodization for an Ultrasound Imaging System
Hyderabad, India
January 03-January 07
ISBN: 0-7695-2502-4
J. Bhattacharyya, Indian Institute of Technology at Kharagpur
P. Mandal, Indian Institute of Technology at Kharagpur
R. Banerjee, Indian Institute of Technology at Kharagpur
Swapna Banerjee, Indian Institute of Technology at Kharagpur
This paper prosposes an algorithm and its VLSI implementation to generate the aperture weighting coefficients for an ultrasound imaging system in real time. The side lobe reduction capability of the proposed scheme has been compared with existing methods and satisfactory results have been obtained. The design has been implemented using XCV2000EBG560 Xilinx FPGA and for a typical 64 channel beamformer (100 scan lines, 512 scan points on each line) found to operate at 40 frames/s. Further speed enhancement in the existing design, if necessary, can easily be made by just using identical blocks in parallel and very small change in the control structure.
Citation:
J. Bhattacharyya, P. Mandal, R. Banerjee, Swapna Banerjee, "Real Time Dynamic Receive Apodization for an Ultrasound Imaging System," vlsid, pp.534-537, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
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