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19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)
Parasitic Aware Routing Methodology Based on Higher Order RLCK Moment Metrics
Hyderabad, India
January 03-January 07
ISBN: 0-7695-2502-4
Amitava Bhaduri, University of Cincinnati
Ranga Vemuri, University of Cincinnati
In the multi-GHz frequency domain, inductive and capacitive parasitics of interconnects can cause significant ?ringing? or overdamping, which may lead to false switching or increased delay. Routing techniques which rely on wire length reduction or coupling capacitance minimization are unable to obtain the best routing solution. In this paper, the inductive and capacitive interactions of the wires are introduced through a ?moment? based cost function. This higher order RLCK moment metric guides the routing process of long wires, ensuring that the chosen solution has the best trade-off between ringing and delay under a monotone signal response. Another significant departure from existing routing methodologies is to account for the signal direction in the nets which may increase or decrease the effective inductive and capacitive parasitics.
Citation:
Amitava Bhaduri, Ranga Vemuri, "Parasitic Aware Routing Methodology Based on Higher Order RLCK Moment Metrics," vlsid, pp.141-146, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
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