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21st International Conference on VLSI Design (VLSI Design 2008)
Formal Verification of a Public-Domain DDR2 Controller Design
Hyderabad, India
January 04-January 08
ISBN: 0-7695-3083-4
ASCII Text
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Abhishek Datta, Vigyan Singhal, "Formal Verification of a Public-Domain DDR2 Controller Design," VLSI Design, International Conference on, pp. 475-480, 21st International Conference on VLSI Design (VLSI Design 2008), 2008.
 
 
BibTex
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@article{ 10.1109/VLSI.2008.94,
author = {Abhishek Datta and Vigyan Singhal},
title = {Formal Verification of a Public-Domain DDR2 Controller Design},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2008},
issn = {1063-9667},
pages = {475-480},
doi = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.94},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - Formal Verification of a Public-Domain DDR2 Controller Design
SN - 1063-9667
SP475
EP480
A1 - Abhishek Datta,
A1 - Vigyan Singhal,
PY - 2008
VL - 0
JA - VLSI Design, International Conference on
ER -
 
This paper demonstrates a formal verification- planning process and presents associated verification strategy that we believe is an essential (yet often neglected) step in an ASIC or SoC functional formal verification flow. Our contribution is to present a way to apply the verification planning process and a set of abstraction techniques on a non-trivial open-source example (the Sun OpenSPARCTM DDR2 controller). The process and verification strategy can be applied to DDR2 controllers in particular and generalized for other designs.
Citation:
Abhishek Datta, Vigyan Singhal, "Formal Verification of a Public-Domain DDR2 Controller Design," vlsid, pp.475-480, 21st International Conference on VLSI Design (VLSI Design 2008), 2008
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