Analog design traditionally relies on designer's knowl- edge and expertise. Numerous automated synthesis meth- ods have been proposed over the years; they reduce time complexity and explore wider design space. Manufactur- ing induced defects in the process parameters, render de- vice characteristics inconsistent with their prediced be- havior. Device mismatch casues significant variation in analog circuit performance. Monte-carlo simulation is known to be the most accurate method of measuring per- formance under random variation. But monte-carlo sim- ulation is prohivitively expensive during synthesis pro- cess. In this work we present a novel Spline Center and Range Regression (SCRR) technique on adaptive samples to model performance in the presence of process varia- tion. Mismatch aware macromodels can provide consid- erable speedup during synthesis with minimal loss in ac- curacy. Experimental results demonstrate the accuracy of the macromodels on an independent validation set using 180nm and 65nm technologies.