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21st International Conference on VLSI Design (VLSI Design 2008)
Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design
Hyderabad, India
January 04-January 08
ISBN: 0-7695-3083-4
Circuit reliability under statistical process variation is an area of growing concern. For highly replicated circuits such as SRAMs and flip flops, a rare statistical event for one circuit may induce a not-so-rare system failure. The authors of [1] proposed Statistical Blockade as a Monte Carlo technique that allows us to efficiently filter--to block--unwanted samples insufficiently rare in the tail distributions we seek. However, there are significant practical problems with the technique. In this work, we show common scenarios in SRAM design where these problems render Statistical Blockade ineffective. We then propose significant extensions to make Statistical Blockade practically usable in these common scenarios. We show speedups of 102+ over standard Statistical Blockade and 104+ over standard Monte Carlo, for an SRAM cell in an in- dustrial 90nm technology.
Citation:
Amith Singhee, Jiajing Wang, Benton H. Calhoun, Rob A. Rutenbar, "Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design," vlsid, pp.131-136, 21st International Conference on VLSI Design (VLSI Design 2008), 2008
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