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21st International Conference on VLSI Design (VLSI Design 2008)
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators
Hyderabad, India
January 04-January 08
ISBN: 0-7695-3083-4
ASCII Text
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Jaime Ramirez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio Lopez-Martin, Ramon Gonzalez Carvajal, "An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators," VLSI Design, International Conference on, pp. 294-299, 21st International Conference on VLSI Design (VLSI Design 2008), 2008.
 
 
BibTex
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@article{ 10.1109/VLSI.2008.30,
author = {Jaime Ramirez-Angulo and Lalitha Mohana Kalyani-Garimella and Annajirao Garimella and Sri Raga Sudha Garimella and Antonio Lopez-Martin and Ramon Gonzalez Carvajal},
title = {An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2008},
issn = {1063-9667},
pages = {294-299},
doi = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.30},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - VLSI Design, International Conference on
TI - An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators
SN - 1063-9667
SP294
EP299
A1 - Jaime Ramirez-Angulo,
A1 - Lalitha Mohana Kalyani-Garimella,
A1 - Annajirao Garimella,
A1 - Sri Raga Sudha Garimella,
A1 - Antonio Lopez-Martin,
A1 - Ramon Gonzalez Carvajal,
PY - 2008
VL - 0
JA - VLSI Design, International Conference on
ER -
 
A rail-to-rail differential input stage with programmable threshold levels and offset compensation is introduced. Applications for the implementation of differential and double differential comparators are discussed. Experimental results obtained from a MOSIS 0.5?m CMOS technology test chip are shown that validate rail-to-rail operation with a 1.5V supply voltage.
Citation:
Jaime Ramirez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio Lopez-Martin, Ramon Gonzalez Carvajal, "An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators," vlsid, pp.294-299, 21st International Conference on VLSI Design (VLSI Design 2008), 2008
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