Mixed Language Design Data Access: Procedural Interface Design Considerations

V
VIUF
2000
VHDL International Users Forum Fall Workshop (VIUF'00)
Abstract - Mixed Language Design Data Access: Procedural Interface Design Considerations

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VHDL International Users Forum Fall Workshop (VIUF'00)

Orlando, Florida

October 18-October 20

ISBN: 0-7695-0890-1

	ASCII Text	x
	Françoise Martinolle, Uma Parvathy, "Mixed Language Design Data Access: Procedural Interface Design Considerations," VHDL International User's Forum, pp. 95, VHDL International Users Forum Fall Workshop (VIUF'00), 2000.

	BibTex	x
	@article{ 10.1109/VIUF.2000.890276, author = {Françoise Martinolle and Uma Parvathy}, title = {Mixed Language Design Data Access: Procedural Interface Design Considerations}, journal ={VHDL International User's Forum}, volume = {0}, year = {2000}, isbn = {0-7695-0890-1}, pages = {95}, doi = {http://doi.ieeecomputersociety.org/10.1109/VIUF.2000.890276}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VHDL International User's Forum TI - Mixed Language Design Data Access: Procedural Interface Design Considerations SN - 0-7695-0890-1 SP EP A1 - Françoise Martinolle, A1 - Uma Parvathy, PY - 2000 VL - 0 JA - VHDL International User's Forum ER -

Françoise Martinolle, Cadence Design Systems, Inc.

Uma Parvathy, Cadence Design Systems, Inc.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VIUF.2000.890276

A Procedural Language Interface allows access of static and runtime data. With mixed language design becoming more prevalent, comes the necessity to develop bilingual Procedural Language Interfaces. What is the best approach? Extend an existing HDL interface to deal with the other language, provide a language-independent interface, or create a dual interface? This paper will discuss the different approaches and describe the solution chosen to develop a Verilog/VHDL language interface.

Citation:

Françoise Martinolle, Uma Parvathy, "Mixed Language Design Data Access: Procedural Interface Design Considerations," viuf, pp.95, VHDL International Users Forum Fall Workshop (VIUF'00), 2000

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