Circular BIST testing the digital logic within a high speed Serdes

I
ITC
2003
International Test Conference 2003 (ITC'03)
Abstract - Circular BIST testing the digital logic within a high speed Serdes

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International Test Conference 2003 (ITC'03)

Charlotte, NC, USA

September 30-October 02

ISBN: 0-7803-8107-6

	ASCII Text	x
	Graham Hetherington, Richard Simpson, "Circular BIST testing the digital logic within a high speed Serdes," Test Conference, International, pp. 1221, International Test Conference 2003 (ITC'03), 2003.

	BibTex	x
	@article{ 10.1109/TEST.2003.1271111, author = {Graham Hetherington and Richard Simpson}, title = {Circular BIST testing the digital logic within a high speed Serdes}, journal ={Test Conference, International}, volume = {0}, year = {2003}, issn = {1089-3539}, pages = {1221}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1271111}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Circular BIST testing the digital logic within a high speed Serdes SN - 1089-3539 SP EP A1 - Graham Hetherington, A1 - Richard Simpson, PY - 2003 KW - null VL - 0 JA - Test Conference, International ER -

Graham Hetherington, Texas Instruments Ltd.

Richard Simpson, Texas Instruments Ltd.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1271111

High Speed Serializer Deserializers (serdes) are traditionally tested using functional BIST. This paper presents an improved BIST for testing the digital part of a serdes using circular BIST.

Citation:

Graham Hetherington, Richard Simpson, "Circular BIST testing the digital logic within a high speed Serdes," itc, pp.1221, International Test Conference 2003 (ITC'03), 2003

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