Testing Clock Distribution Circuits Using an Analytic Signal Method

I
ITC
2001
International Test Conference 2001 (ITC'01)
Abstract - Testing Clock Distribution Circuits Using an Analytic Signal Method

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International Test Conference 2001 (ITC'01)

Baltimore, Maryland

October 30-November 01

ISBN: 0-7803-7171-2

	ASCII Text	x
	Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida, "Testing Clock Distribution Circuits Using an Analytic Signal Method," Test Conference, International, pp. 323, International Test Conference 2001 (ITC'01), 2001.

	BibTex	x
	@article{ 10.1109/TEST.2001.966648, author = {Takahiro J. Yamaguchi and Mani Soma and Jim Nissen and David Halter and Rajesh Raina and Masahiro Ishida}, title = {Testing Clock Distribution Circuits Using an Analytic Signal Method}, journal ={Test Conference, International}, volume = {0}, year = {2001}, isbn = {0-7803-7171-2}, pages = {323}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2001.966648}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Testing Clock Distribution Circuits Using an Analytic Signal Method SN - 0-7803-7171-2 SP EP A1 - Takahiro J. Yamaguchi, A1 - Mani Soma, A1 - Jim Nissen, A1 - David Halter, A1 - Rajesh Raina, A1 - Masahiro Ishida, PY - 2001 KW - null VL - 0 JA - Test Conference, International ER -

Takahiro J. Yamaguchi, Advantest Laboratories, Ltd.

Mani Soma, University of Washington

Jim Nissen, Motorola Inc.

David Halter, Motorola Inc.

Rajesh Raina, Motorola Inc.

Masahiro Ishida, Advantest Laboratories, Ltd.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2001.966648

This paper presents an application of a new analytic signal method for measuring clock skews in the clock distribution network of microprocessors. The method can measure skews between the master system clock and distributed clocks, between two distributed clocks, or between clocks whose frequencies are related by frequency division. Experimental data using a PowerPC TM microprocessor is presented for validation.

Citation:

Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida, "Testing Clock Distribution Circuits Using an Analytic Signal Method," itc, pp.323, International Test Conference 2001 (ITC'01), 2001

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