| | This Article | |
| |
| |
| | Share | |
| |
| |
| | Bibliographic References | |
| |
| |
| | Add to: | |
| |
 Digg
 Furl
 Spurl
 Blink
 Simpy
 Google
 Del.icio.us
 Y!MyWeb
| |
| | Search | |
| |
| |
| | |
Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation
November 2006 (vol. 55 no. 11)
pp. 1344-1355
The initial state of a design under verification has a major impact on the ability of stimuli generators to successfully generate the requested stimuli. For complexity reasons, most stimuli generators use sequential solutions without planning ahead. Therefore, in many cases, they fail to produce a consistent stimuli due to an inadequate selection of the initial state. We propose a new method, based on machine learning techniques, to improve generation success by learning the relationship between the initial state vector and generation success. We applied the proposed method in two different settings, with the objective of improving generation success and coverage in processor and system level generation. In both settings, the proposed method significantly reduced generation failures and enabled faster coverage.
[1] 1344 B. Wile, J.C. Goss, and W. Roesner, Comprehensive Functional Verification: The Complete Industry Cycle. Elsevier, 2005.[2] A. Aharon, D. Goodman, M. Levinger, Y. Lichtenstein, Y. Malka, C. Metzger, M. Molcho, and G. Shurek, “Test Program Generation for Functional Verification of PowerPC Processors in IBM,” Proc. 32nd Design Automation Conf., pp. 279-285, June 1995.[3] R. Emek, I. Jaeger, Y. Naveh, G. Bergman, G. Aloni, Y. Katz, M. Farkash, I. Dozoretz, and A. Goldin, “X-Gen: A Random Test-Case Generator for Systems and SoCs,” Proc. IEEE Int'l High Level Design Validation and Test Workshop, pp. 145-150, Oct. 2002.[4] A. Piziali, Functional Verification Coverage Measurement and Analysis. Springer, 2004.[5] E. Bin, R. Emek, G. Shurek, and A. Ziv, “Using a Constraint Satisfaction Formulation and Solution Techniques for Random Test Program Generation,” IBM Systems J., vol. 41, no. 3, pp. 386-402, 2002.[6] J. Pearl, Probabilistic Reasoning in Intelligent Systems: Network of Plausible Inference. Morgan Kaufmann, 1988.[7] S. Fine and A. Ziv, “Coverage Directed Test Generation for Functional Verification Using Bayesian Networks,” Proc. 40th Design Automation Conf., pp. 286-291, June 2003.[8] E.M. Clarke, O. Grumberg, and D.A. Peled, Model Checking. MIT-Press, 1999.[9] L. Fournier, Y. Arbetman, and M. Levinger, “Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator,” Proc. 1999 Design, Automation and Test in Europe Conf. (DATE), pp. 434-441, Mar. 1999.[10] D. Angluin, “Queries and Concept Learning,” Machine Learning, vol. 2, no. 4, pp. 319-342, 1988.[11] D. Heckerman, “A Tutorial on Learning with Bayesian Networks” Technical Report MSR-TR-95-06, Microsoft Research, Redmond, Wash., 1996.[12] A.C. Atkinson and A.N. Donev, Optimum Experimental Design. Oxford Science Publications, 1992.[13] Y. Mansour, “Learning Boolean Functions via the Fourier Transform,” Theoretical Advances in Neural Computation and Learning, V.Roychowdhury, K.-Y. Siu, and A. Orlitsky, eds., pp. 391-424, Kluwer Academic, 1994.[14] The PowerPC Architecture, C. May, E. Silha, R. Simpson, and H.Warren, eds. Morgan Kaufmann, 1994.[15] O. Lachish, E. Marcus, S. Ur, and A. Ziv, “Hole Analysis for Functional Coverage Data,” Proc. 39th Design Automation Conf., pp.806-811, June 2002.[16] A. Adir, E. Almog, L. Fournier, E. Marcus, M. Rimon, M. Vinov, and A. Ziv, “Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification,” IEEE Design and Test of Computers, vol. 21, no. 2, pp. 84-93, 2004.[17] T. Shanley, InfiniBand Network Architecture. Addison-Wesley, 2002.
Index Terms:
Functional verification, coverage analysis, coverage directed generation, machine learning, Bayesian networks, Fourier transforms.
Citation:
Shai Fine, Ari Freund, Itai Jaeger, Yishay Mansour, Yehuda Naveh, Avi Ziv, "Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation," IEEE Transactions on Computers, vol. 55, no. 11, pp. 1344-1355, Nov. 2006, doi:10.1109/TC.2006.183
