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Network Interface Data Caching
November 2005 (vol. 54 no. 11)
pp. 1394-1408
Network interface data caching reduces local interconnect traffic on network servers by caching frequently-requested content on a programmable network interface. The operating system on the host CPU determines which data to store in the cache and for which packets it should use data from the cache. To facilitate data reuse across multiple packets and connections, the cache only stores application-level response content (such as HTTP data), with application-level and networking headers generated by the host CPU. Network interface data caching reduces PCI traffic by 12-61 percent for six Web workloads on a prototype implementation of a uniprocessor Web server. This traffic reduction improves peak throughput for three workloads by 6-36 percent.
[1] Alteon WebSystems, Gigabit Ethernet/PCI Network Interface Card: Host/NIC Software Interface Definition, July 1999.
[2] M.F. Arlitt and C.L. Williamson, “Internet Web Servers: Workload Characterization and Performance Implications,” IEEE/ACM Trans. Networking, vol. 5, no. 5, pp. 631-645, Oct. 1997.
[3] N.J. Boden, D. Cohen, R.E. Felderman, A.E. Kulawik, C.L. Seitz, J.N. Seizovic, and W.-K. Su, “Myrinet: A Gigabit-per-Second Local Area Network,” IEEE MICRO, vol. 15, no. 1, pp. 29-36, 1995.
[4] L. Breslau, P. Cao, L. Fan, G. Phillips, and S. Schenker, “Web Caching and Zipf-Like Distributions: Evidence and Implications,” Proc. IEEE INFOCOM '99, vol. 1, pp. 126-134, Mar. 1999.
[5] P. Buonadonna and D. Culler, “Queue Pair IP: A Hybrid Architecture for System Area Networks,” Proc. 29th Int'l Symp. Computer Architecture, pp. 247-256, May 2002.
[6] P. Cao and S. Irani, “Cost-Aware WWW Proxy Caching Algorithms,” Proc. USENIX Symp. Internet Technology and Systems, pp. 193-206, Dec. 1997.
[7] P. Druschel and L.L. Peterson, “Fbufs: A High-Bandwidth Cross-Domain Transfer Facility,” Proc. 14th Symp. Operating Systems Principles (SOSP-14), pp. 189-202, Dec. 1993.
[8] D. Dunning, G. Regnier, G. McAlpine, D. Cameron, B. Shubert, F. Berry, A.M. Merritt, E. Gronke, and C. Dodd, “The Virtual Interface Architecture,” IEEE MICRO, vol. 18, no. 2, pp. 66-76, Mar. 1998.
[9] Intel Corporation, IA-32 Intel Architecture Software Developer's Manual, 2002.
[10] H.-y. Kim, V.S. Pai, and S. Rixner, “Increasing Web Server Throughput with Network Interface Data Caching,” Proc. 10th Int'l Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), pp. 235-250, 2002.
[11] H.-y. Kim, V.S. Pai, and S. Rixner, “Exploiting Task-Level Concurrency in a Programmable Network Interface,” Proc. ACM SIGPLAN Symp. Principles and Practice of Parallel Programming, pp. 61-72, June 2003.
[12] K. Kleinpaste, P. Steenkiste, and B. Zill, “Software Support for Outboard Buffering and Checksumming,” Proc. ACM SIGCOMM Conf. Applications, Technologies, Architectures, and Protocols for Computer Comm., pp. 87-98, Aug. 1995.
[13] Micron Technology, Inc., Synchronous DRAM 128Mb: x32 SDRAM MT48LC4M32B2, 2001.
[14] R. Minnich, D. Burns, and F. Hady, “The Memory-Integrated Network Interface,” IEEE MICRO, vol. 15, no. 1, pp. 11-20, Feb. 1995.
[15] S.S. Mukherjee, B. Falsafi, M.D. Hill, and D.A. Wood, “Coherent Network Interfaces for Fine-Grain Communication,” Proc. 23rd Int'l Symp. Computer Architecture, pp. 247-258, 1996.
[16] E.M. Nahum, T. Barzilai, and D. Kandlur, “Performance Issues in WWW Servers,” IEEE/ACM Trans. Networking, vol. 10, no. 2, pp. 2-11, Feb. 2002.
[17] V.S. Pai, P. Druschel, and W. Zwaenepoel, “Flash: An Efficient and Portable Web Server,” Proc. USENIX 1999 Ann. Technical Conf., pp. 199-212, June 1999.
[18] V.S. Pai, P. Druschel, and W. Zwaenepoel, “I/O-Lite: A Unified I/O Buffering and Caching System,” Proc. Third USENIX Symp. Operating Systems Design and Implementation, pp. 15-28, Feb. 1999.
[19] F. Petrini, W.-C. Feng, A. Hoisie, S. Coll, and E. Frachtenberg, “The Quadrics Network: High-Performance Clustering Technology,” IEEE MICRO, vol. 22, no. 1, pp. 46-57, Jan. 2002.
[20] I. Pratt and K. Fraser, “Arsenic: A User-Accessible Gigabit Ethernet Interface,” Proc. IEEE INFOCOM '01, pp. 67-76, 2001.
[21] P. Shivam, P. Wyckoff, and D. Panda, “EMP: Zero-Copy OS-Bypass NIC-Driven Gigabit Ethernet Message Passing,” Proc. 2001 ACM/IEEE Conf. Supercomputing (SC2001), Nov. 2001.
[22] G. Tyson, M. Farrens, J. Matthews, and A.R. Pleszkun, “A Modified Approach to Data Cache Management,” Proc. 28th Ann. Int'l Symp. Microarchitecture, pp. 93-103, Dec. 1995.
[23] M. Welsh, A. Basu, and T. von Eicken, “ATM and Fast Ethernet Network Interfaces for User-Level Communications,” Proc. Third Int'l Symp. High Performance Computer Architecture, pp. 332-342, Feb. 1997.
[24] D.L. Willick, D.L. Eager, and R.B. Bunt, “Disk Cache Replacement Policies for Network Fileservers,” Proc. 13th Int'l Conf. Distributed Computing Systems, pp. 2-11, May 1993.
[25] K. Yocum and J. Chase, “Payload Caching: High-Speed Data Forwarding for Network Intermediaries,” Proc. 2001 Ann. USENIX Technical Conf., pp. 305-317, June 2001.
Index Terms:
Index Terms- Web servers, local interconnects, network interfaces, operating systems.
Citation:
Hyong-youb Kim, Scott Rixner, Vijay S. Pai, "Network Interface Data Caching," IEEE Transactions on Computers, vol. 54, no. 11, pp. 1394-1408, Nov. 2005, doi:10.1109/TC.2005.185
