Ninth International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC 2007) Parallel Multiple Polynomial Quadratic Sieve on Multi-Core Architectures Timisoara, Romania September 26-September 29 ISBN: 0-7695-3078-8
The ability of multi-core processors to increase application performance depends on the use of multiple threads within applications. Symbolic computations, requiring both CPU power and large memory, are well-suited candidates for deriving advantages from multi-core parallel architectures. This is possible only if the specific libraries and tools are designed to allow multi-threading and multi-processes. In order to promote the changes needed to adapt these libraries and tools to the new architectures, the changes performed of a main algorithm for symbolic computations, parallel integer factorization, is described and discussed.
Citation:
Georgiana Macariu, Dana Petcu, "Parallel Multiple Polynomial Quadratic Sieve on Multi-Core Architectures," synasc, pp.59-65, Ninth International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC 2007), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||