Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach

S
SYNASC
2005
Seventh International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'05)
Abstract - Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach

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	Similar Articles Articles by Srivastav Sethupathy Articles by Nohpill Park Articles by Marcin Paprzycki

Seventh International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'05)

Timisoara, Romania

September 25-September 29

ISBN: 0-7695-2453-2

	ASCII Text	x
	Srivastav Sethupathy, Nohpill Park, Marcin Paprzycki, "Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach," Symbolic and Numeric Algorithms for Scientific Computing, International Symposium on, pp. 182-188, Seventh International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'05), 2005.

	BibTex	x
	@article{ 10.1109/SYNASC.2005.42, author = {Srivastav Sethupathy and Nohpill Park and Marcin Paprzycki}, title = {Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach}, journal ={Symbolic and Numeric Algorithms for Scientific Computing, International Symposium on}, volume = {0}, year = {2005}, isbn = {0-7695-2453-2}, pages = {182-188}, doi = {http://doi.ieeecomputersociety.org/10.1109/SYNASC.2005.42}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Symbolic and Numeric Algorithms for Scientific Computing, International Symposium on TI - Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach SN - 0-7695-2453-2 SP182 EP188 A1 - Srivastav Sethupathy, A1 - Nohpill Park, A1 - Marcin Paprzycki, PY - 2005 KW - null VL - 0 JA - Symbolic and Numeric Algorithms for Scientific Computing, International Symposium on ER -

Srivastav Sethupathy, OSU

Nohpill Park, OSU

Marcin Paprzycki, SWPS

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/SYNASC.2005.42

In this paper we apply integer programming (IP) based techniques to the problem of delay balancing in wave-pipelined circuits. The proposed approach considers delays, as well as fan-in and fan-out associated with every node in the circuit. After a weighted graph representation of the circuit is formed a node collapsing procedure is used to preprocess (reduce the size of) the system and to obtain the final formulation of the IP problem, which is solved by using a branch and bound heuristic to acquire a minimum delay in the circuit. We also compare the proposed technique with application — to the same problem — of a linear programming solver.

Citation:

Srivastav Sethupathy, Nohpill Park, Marcin Paprzycki, "Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach," synasc, pp.182-188, Seventh International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'05), 2005

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