Design of Low-power Baseband-processor for RFID Tag

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2006 International Symposium on Applications and the Internet Workshops (SAINT 2006 Workshops)

Phoenix, Arizona

January 23-January 27

ISBN: 0-7695-2510-5

	ASCII Text	x
	He Yan, Hu jianyun, Li Qiang, Min Hao, "Design of Low-power Baseband-processor for RFID Tag," Applications and the Internet Workshops, IEEE/IPSJ International Symposium on, pp. 60-63, 2006 International Symposium on Applications and the Internet Workshops (SAINT 2006 Workshops), 2006.

	BibTex	x
	@article{ 10.1109/SAINT-W.2006.15, author = {He Yan and Hu jianyun and Li Qiang and Min Hao}, title = {Design of Low-power Baseband-processor for RFID Tag}, journal ={Applications and the Internet Workshops, IEEE/IPSJ International Symposium on}, volume = {0}, year = {2006}, isbn = {0-7695-2510-5}, pages = {60-63}, doi = {http://doi.ieeecomputersociety.org/10.1109/SAINT-W.2006.15}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Applications and the Internet Workshops, IEEE/IPSJ International Symposium on TI - Design of Low-power Baseband-processor for RFID Tag SN - 0-7695-2510-5 SP60 EP63 A1 - He Yan, A1 - Hu jianyun, A1 - Li Qiang, A1 - Min Hao, PY - 2006 KW - null VL - 0 JA - Applications and the Internet Workshops, IEEE/IPSJ International Symposium on ER -

He Yan, Fudan University, China

Hu jianyun, Fudan University, China

Li Qiang, Fudan University, China

Min Hao, Fudan University, China

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/SAINT-W.2006.15

This paper analyzes the power consumption of an RFID tag and presents a new architecture of a low-power baseband-processor for this special passive tag. The tag consists of a power reception system, an emitter/receiver analog module, an EEPROM and a low-power basebandprocessor, compatible with the newest EPCTM C1G2 UHF RFID Protocol. Meanwhile some novel and advanced lowpower technologies are adopted for the special low-power baseband-processor, which not only implements the anticollision schemes and authorization scheme, but also executes read/write operation to EEPROM. The chip was designed and fabricated using 0.35 ?m 3 metal layers CMOS technology successfully.

Citation:

He Yan, Hu jianyun, Li Qiang, Min Hao, "Design of Low-power Baseband-processor for RFID Tag," saint-w, pp.60-63, 2006 International Symposium on Applications and the Internet Workshops (SAINT 2006 Workshops), 2006

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