13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007)
A NOR Emulation Strategy over NAND Flash Memory
Daegu, Korea
August 21-August 24
ISBN: 0-7695-2975-5
Jian-Hong Lin, National Taiwan University, Taipei, Taiwan 106, R.O.C.
Yuan-Hao Chang, National Taiwan University, Taipei, Taiwan 106, R.O.C.
Jen-Wei Hsieh, National Taiwan University, Taipei, Taiwan 106, R.O.C.
Tei-Wei Kuo, National Taiwan University, Taipei, Taiwan 106, R.O.C.
Cheng-Chih Yang, Product Development Firmware Engineering Gruop Genesys Logic, Inc. Taipei, Taiwan 231, R.O.C
This work is motivated by a strong market demand in the replacement of NOR flash memory with NAND flash memory to cut down the cost in many embedded-system designs, such as mobile phones. Different from LRU-related caching or buffering studies, we are interested in prediction-based prefetching based on given execution traces of application executions. An implementation strategy is proposed in the storage of the prefetching information with limited SRAM and run-time overheads. An efficient prediction procedure is presented based on information extracted from application executions to reduce the performance gap between NAND flash memory and NOR flash memory in reads. With the behavior of a target application extracted from a set of collected traces, we show that data access to NOR flash memory can be responded effectively over the proposed implementation.
Citation:
Jian-Hong Lin, Yuan-Hao Chang, Jen-Wei Hsieh, Tei-Wei Kuo, Cheng-Chih Yang, "A NOR Emulation Strategy over NAND Flash Memory," rtcsa, pp.95-102, 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007