In this paper, we develop a novel real-time instructionlevel loop scheduling technique to reduce leakage energy consumption for applications with loops on VLIW architecture. We first prove that the scheduling problem with the minimum leakage energy consumption within a timing constraint is NP-complete. Then, LEMLS (Leakage Energy Minimization Loop Scheduling) algorithm is designed to repeatedly regroup a loop based on rotation scheduling [3], and decrease leakage energy integrating with leakage power reduction mechanism. We conduct experiments on a set of DSP benchmarks based on the power model of the VLIW processors in [12]. The results show that our algorithm achieves significant leakage energy saving compared with list scheduling and the algorithm in [19].