loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007)
Interactive Back-annotation of Worst-case Execution Time Analysis for Java Microprocessors
Daegu, Korea
August 21-August 24
ISBN: 0-7695-2975-5
Trevor Harmon, University of California, Irvine
Raymond Klefstad, University of California, Irvine

As real-time systems become more prevalent, there is a need to guarantee that these increasingly complex systems perform as designed. One technique involves a static analysis to place an upper bound on worst-case execution time (WCET). Tools for conducting this analysis typically require the developer to digest assembly opcodes, hexadecimal addresses, and other low-level details in order to make sense of the results.

Java-specific processors offer a way out of this complexity. Such processors make Java software more predictable, and as a consequence, timing analysis of a real-time system becomes less computationally intensive. WCET analysis tools based on these processors can thus offer more powerful features at higher levels of abstraction.

As proof of this concept, we present a tool for static WCET analysis of Java processors. Our performance measurements show that this tool makes WCET analysis interactive, offering continuous feedback to the developer in the form of back-annotations.

Citation:
Trevor Harmon, Raymond Klefstad, "Interactive Back-annotation of Worst-case Execution Time Analysis for Java Microprocessors," rtcsa, pp.209-216, 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007
Usage of this product signifies your acceptance of the Terms of Use.