11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05) An Efficient Search Algorithm of Worst-Case Cache Flush Timings Hong Kong, China August 17-August 19 ISBN: 0-7695-2346-3
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RTCSA.2005.22
In recent years, the use of cache memory has been desired in hard real-time systems in order to reduce the memory access time. To enable it, accurate analysis of the worst-case execution time considering cache flushes is necessary since the cache may be flushed by preempting tasks in a multitask environment. This paper proposes a method to find the worst-case timing of cache flushes and demonstrates its effectiveness.
Citation:
Hiroshi Miyamoto, Shinichi Iiyama, Hiroyuki Tomiyama, Hiroaki Takada, Hiroshi Nakashima, "An Efficient Search Algorithm of Worst-Case Cache Flush Timings," rtcsa, pp.45-52, 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||