2008 IEEE Real-Time and Embedded Technology and Applications Symposium Equivalence between Schedule Representations: Theory and Applications April 22-April 24 ISBN: 978-0-7695-3146-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RTAS.2008.17
Multiprocessor scheduling problems are hard because of the numerous constraints on valid schedules to take into account. This paper presents new schedule representations in order to overcome these difficulties, by allowing processors to be fractionally allocated. We prove that these representations are equivalent to the standard representations when preemptive scheduling is allowed. This allows the creation of scheduling algorithms and the study of feasibility in the simpler representations. We apply this method throughout the paper. Then, we use it to provide new simple solutions to the previously solved implicit-deadline periodic scheduling problem. We also tackle the more general problem of scheduling arbitrary time-triggered tasks, and thus in particular solve the open multiprocessor general periodic tasks scheduling problem. Contrary to previous solutions like the PFair class of algorithms, the proposed solution also works when processors have different speeds. We complete the method by providing an online schedule transformation algorithm, that allows the efficient handling of both time-triggered and event-triggered tasks, as well as the creation of online rate-based scheduling algorithms on multiprocessors.
Index Terms:
multiprocessor, real-time scheduling, periodic tasks, optimal scheduling, scheduling theory
Citation:
Matthieu Lemerre, Vincent David, Christophe Aussagu?, Guy Vidal-Naquet, "Equivalence between Schedule Representations: Theory and Applications," rtas, pp.237-247, 2008 IEEE Real-Time and Embedded Technology and Applications Symposium, 2008 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||