18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07) A Re-configurable FTL (Flash Translation Layer) Architecture for NAND Flash based Applications Porto Alegre, RS, Brazil May 28-May 30 ISBN: 0-7695-2834-1
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RSP.2007.8
In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.
Citation:
Chanik Park, Wonmoon Cheon, Yangsup Lee, Myoung-Soo Jung, Wonhee Cho, Hanbin Yoon, "A Re-configurable FTL (Flash Translation Layer) Architecture for NAND Flash based Applications," rsp, pp.202-208, 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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