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14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06)
DynaCORE — A Dynamically Reconfigurable Coprocessor Architecture for Network Processors
Montb?liard-Sochaux, France
February 15-February 17
ISBN: 0-7695-2513-X
ASCII Text
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Carsten Albrecht, Jurgen Foag , Roman Koch, Erik Maehle, "DynaCORE — A Dynamically Reconfigurable Coprocessor Architecture for Network Processors," Parallel, Distributed, and Network-Based Processing, Euromicro Conference on, pp. 101-108, 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06), 2006.
 
 
BibTex
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@article{ 10.1109/PDP.2006.30,
author = {Carsten Albrecht and Jurgen Foag and Roman Koch and Erik Maehle},
title = {DynaCORE — A Dynamically Reconfigurable Coprocessor Architecture for Network Processors},
journal ={Parallel, Distributed, and Network-Based Processing, Euromicro Conference on},
volume = {0},
year = {2006},
issn = {1066-6192},
pages = {101-108},
doi = {http://doi.ieeecomputersociety.org/10.1109/PDP.2006.30},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Parallel, Distributed, and Network-Based Processing, Euromicro Conference on
TI - DynaCORE — A Dynamically Reconfigurable Coprocessor Architecture for Network Processors
SN - 1066-6192
SP101
EP108
A1 - Carsten Albrecht,
A1 - Jurgen Foag ,
A1 - Roman Koch,
A1 - Erik Maehle,
PY - 2006
KW - null
VL - 0
JA - Parallel, Distributed, and Network-Based Processing, Euromicro Conference on
ER -
 
Carsten Albrecht, University of Lubeck, Lubeck, Germany
Jurgen Foag, University of Lubeck, Lubeck, Germany
Roman Koch, University of Lubeck, Lubeck, Germany
Erik Maehle, University of Lubeck, Lubeck, Germany
Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payload processing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.
Citation:
Carsten Albrecht, Jurgen Foag , Roman Koch, Erik Maehle, "DynaCORE — A Dynamically Reconfigurable Coprocessor Architecture for Network Processors," pdp, pp.101-108, 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'06), 2006
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