Seventh International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT'06) Reverse Compilation for Speculative Parallel Threading Taipei, Taiwan December 04-December 07 ISBN: 0-7695-2736-1
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PDCAT.2006.94
Multi-core processors can easily provide benefits for multithreaded workloads, but many applications written for uniprocessors cannot automatically benefit from chip multiprocessors (CMP) designs. This paper presents a reverse compilation framework, which translates existing binary code without source code to the Static Single Assignment (SSA) form, and then the internal SSA form is applied by the compilation phase to generate the Speculative Parallel Threading (SPT) code. A profiler is applied to optimize the code dynamically during execution. The evaluation results show that these existing binary codes without source codes execute on CMP with performance improved, due to taking advantage of the speculative parallel threading support provided by the processor.
Citation:
Xiaoqi Yang, Qilong Zheng, Guoliang Chen, Zhen Yao, "Reverse Compilation for Speculative Parallel Threading," pdcat, pp.138-143, Seventh International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||