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Sixth International Conference on Parallel and Distributed Computing Applications and Technologies (PDCAT'05)
Loop Parallelisation for the Jikes RVM
Dalian, China
December 05-December 08
ISBN: 0-7695-2405-2
Jisheng Zhao, University of Manchester, UK
Ian Rogers, University of Manchester, UK
Chris Kirkham, University of Manchester, UK
Ian Watson, University of Manchester, UK
Increasing the number of instructions executing in parallel has helped improve processor performance, but the technique is limited. Executing code on parallel threads and processors has fewer limitations, but most computer programs tend to be serial in nature. This paper presents a compiler optimisation that at run-time parallelises code inside a JVM and thereby increases the number of threads. We show Spec JVM benchmark results for this optimisation. The performance on a current desktop processor is slower than without parallel threads, caused by thread creation costs, but with these costs removed the performance is better than the serial code. We measure the threading costs and discuss how a future computer architecture will enable this optimisation to be feasible in exploiting thread instead of instruction and/or vector parallelism.
Citation:
Jisheng Zhao, Ian Rogers, Chris Kirkham, Ian Watson, "Loop Parallelisation for the Jikes RVM," pdcat, pp.35-39, Sixth International Conference on Parallel and Distributed Computing Applications and Technologies (PDCAT'05), 2005
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