Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board

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Sixth International Conference on Parallel and Distributed Computing Applications and Technologies (PDCAT'05)

Dalian, China

December 05-December 08

ISBN: 0-7695-2405-2

	ASCII Text	x
	Akira Kitamura, Yasuo Miyabe, Tetsu Izawa, Tomotaka Miyashiro, Konosuke Watanabe, Tomohiro Otsuka, Hideharu Amano, Yoshihiro Hamada, Noboru Tanabe, Hironori Nakajo, "Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board," Parallel and Distributed Computing Applications and Technologies, International Conference on, pp. 778-780, Sixth International Conference on Parallel and Distributed Computing Applications and Technologies (PDCAT'05), 2005.

	BibTex	x
	@article{ 10.1109/PDCAT.2005.136, author = {Akira Kitamura and Yasuo Miyabe and Tetsu Izawa and Tomotaka Miyashiro and Konosuke Watanabe and Tomohiro Otsuka and Hideharu Amano and Yoshihiro Hamada and Noboru Tanabe and Hironori Nakajo}, title = {Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board}, journal ={Parallel and Distributed Computing Applications and Technologies, International Conference on}, volume = {0}, year = {2005}, isbn = {0-7695-2405-2}, pages = {778-780}, doi = {http://doi.ieeecomputersociety.org/10.1109/PDCAT.2005.136}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel and Distributed Computing Applications and Technologies, International Conference on TI - Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board SN - 0-7695-2405-2 SP778 EP780 A1 - Akira Kitamura, A1 - Yasuo Miyabe, A1 - Tetsu Izawa, A1 - Tomotaka Miyashiro, A1 - Konosuke Watanabe, A1 - Tomohiro Otsuka, A1 - Hideharu Amano, A1 - Yoshihiro Hamada, A1 - Noboru Tanabe, A1 - Hironori Nakajo, PY - 2005 KW - null VL - 0 JA - Parallel and Distributed Computing Applications and Technologies, International Conference on ER -

Akira Kitamura, Keio University, Japan

Yasuo Miyabe, Keio University, Japan

Tetsu Izawa, Keio University, Japan

Tomotaka Miyashiro, Keio University, Japan

Konosuke Watanabe, Keio University, Japan

Tomohiro Otsuka, Keio University, Japan

Hideharu Amano, Keio University, Japan

Yoshihiro Hamada, Tokyo University of Agriculture and Technology, Japan

Noboru Tanabe, Corporate Research and Development Center, Toshiba, Japan

Hironori Nakajo, Tokyo University of Agriculture and Technology, Japan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PDCAT.2005.136

By recent performance improvement of interconnection networks for a PC cluster, standard I/O bus which connects network interface becomes the performance bottleneck. DIMMnet is a network interface which can solve the problem by using the memory bus instead of PCI bus or other I/O buses. The second generation network interface DIMMnet-2 can be connected with DDR-SDRAM slot by using the indirect accessing to memory and buffers. Although the current board is a prototype using an FPGA, the latency for 8 Bytes data transfer is only 0.441?s.

Citation:

Akira Kitamura, Yasuo Miyabe, Tetsu Izawa, Tomotaka Miyashiro, Konosuke Watanabe, Tomohiro Otsuka, Hideharu Amano, Yoshihiro Hamada, Noboru Tanabe, Hironori Nakajo, "Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board," pdcat, pp.778-780, Sixth International Conference on Parallel and Distributed Computing Applications and Technologies (PDCAT'05), 2005

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