loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04)
Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors
Dresden, Germany
September 07-September 10
ISBN: 0-7695-2080-4
ASCII Text
x 
 
G. Tsilikas, M. Fleury, "Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors," Parallel Computing in Electrical Engineering, International Conference on, pp. 13-18, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004.
 
 
BibTex
x
 
@article{ 10.1109/PCEE.2004.43,
author = {G. Tsilikas and M. Fleury},
title = {Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors},
journal ={Parallel Computing in Electrical Engineering, International Conference on},
volume = {0},
year = {2004},
isbn = {0-7695-2080-4},
pages = {13-18},
doi = {http://doi.ieeecomputersociety.org/10.1109/PCEE.2004.43},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Computing in Electrical Engineering, International Conference on
TI - Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors
SN - 0-7695-2080-4
SP13
EP18
A1 - G. Tsilikas,
A1 - M. Fleury,
PY - 2004
KW - null
VL - 0
JA - Parallel Computing in Electrical Engineering, International Conference on
ER -
 
G. Tsilikas, University of Essex, UK
M. Fleury, University of Essex, UK
Cache-oblivious algorithms for matrix multiplication are confirmed as an effective way of exploiting Intel architecture shared-memory multiprocessors. The performance also remains consistent across a wide range of matrix size. The Cilk programming environment remains an effective way of implementing this type of algorithm, but the need for portability and a compiler upgrade route mean that a portability library is a competitive alternative. The paper considers the interaction of matrix multiplication algorithms with the memory hierarchy, as well as multithreading across differing operating system variants and compilers.
Citation:
G. Tsilikas, M. Fleury, "Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors," parelec, pp.13-18, International Conference on Parallel Computing in Electrical Engineering, (PARELEC'04), 2004
Usage of this product signifies your acceptance of the Terms of Use.