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International Conference on Parallel Computing in Electrical Engineering (PARELEC'02)
Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot
Warsaw, Poland
September 22-September 25
ISBN: 0-7695-1730-7
ASCII Text
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Noboru Tanabe, Yoshihiro Hamada, Hironori Nakajo, Hideki Imashiro, Junji Yamamoto, Tomohiro Kudoh, Hideharu Amano, "Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot," Parallel Computing in Electrical Engineering, International Conference on, pp. 9, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002.
 
 
BibTex
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@article{ 10.1109/PCEE.2002.1115189,
author = {Noboru Tanabe and Yoshihiro Hamada and Hironori Nakajo and Hideki Imashiro and Junji Yamamoto and Tomohiro Kudoh and Hideharu Amano},
title = {Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot},
journal ={Parallel Computing in Electrical Engineering, International Conference on},
volume = {0},
year = {2002},
isbn = {0-7695-1730-7},
pages = {9},
doi = {http://doi.ieeecomputersociety.org/10.1109/PCEE.2002.1115189},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Computing in Electrical Engineering, International Conference on
TI - Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot
SN - 0-7695-1730-7
SP
EP
A1 - Noboru Tanabe,
A1 - Yoshihiro Hamada,
A1 - Hironori Nakajo,
A1 - Hideki Imashiro,
A1 - Junji Yamamoto,
A1 - Tomohiro Kudoh,
A1 - Hideharu Amano,
PY - 2002
KW - null
VL - 0
JA - Parallel Computing in Electrical Engineering, International Conference on
ER -
 
Noboru Tanabe, Toshiba Corporation
Yoshihiro Hamada, Tokyo University of Agriculture and Technology
Hironori Nakajo, Tokyo University of Agriculture and Technology
Hideki Imashiro, Hitachi Information Technology Co., Ltd.
Junji Yamamoto, Hitachi, Ltd.
Tomohiro Kudoh, National Institute of Advanced Industrial Science and Technology
Hideharu Amano, Keio University
DIMMnet-1 is a high performance network interface for PC clusters that can be directly plugged into the DIMM slot of a PC. By using both low latency AOTF (Atomic On-The-Fly) sending and high bandwidth BOTF (Block On-The-Fly) sending, it can overcome the overhead caused by standard I/O such as the PCI bus. Two types of DIMMnet-1 prototype boards (providing optical and electrical network interfaces) containing a Martini network interface controller chip are currently available. They can be plugged into a 100MHz DIMM slot of a PC with a Pentium-3, Pentium-4 or Athlon processor. The round-trip time for AOTF on this incompletely tuned DIMMnet-1 is 7.5 times faster than Myrinet2000. The barrier synchronization time for AOTF is 4 times faster than that of an SR8000 supercomputer. The inter-two-node floating sum operation time is 1903 ns. This shows that DIMMnet-1 holds promise for applications in which scalable performance with traditional approaches is difficult because of frequent data exchange.
Citation:
Noboru Tanabe, Yoshihiro Hamada, Hironori Nakajo, Hideki Imashiro, Junji Yamamoto, Tomohiro Kudoh, Hideharu Amano, "Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot," parelec, pp.9, International Conference on Parallel Computing in Electrical Engineering (PARELEC'02), 2002
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