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International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06)
Enabling Reconfigurable Hardware Accelerators for the Grid
Bialystok, Poland
September 13-September 17
ISBN: 0-7695-2554-7
Stefan Dydel, Nicolaus Copernicus University, Poland
Krzysztof Benedyczak, Nicolaus Copernicus University, Poland
Piotr Bala, Nicolaus Copernicus University, Poland
this paper we describe developed hardware/software composition enabling Field Programmable Logic Devices (FPGAs) in the UNICORE Grid environment. A Smith- Waterman algorithm for aminoacid and DNA sequences is implemented in FPGA PCI extension card, interfaced with Linux workstation running kernel 2.6 series through special low level module and is exposed to the final user with the UNICORE middleware. This approach gives remote, secure, uniform and easy to use graphical access to the very specialised hardware accelerated service. Additionally, great flexibility to the UNIX system is provided due to separation of a different hardware and software levels using UNICORE plugins. The approach is very effective in a BioGrid context, where we are interested in integration of sophisticate accelerated distributed computational resources and providing general grid functionality consisting of single login, job submission and control mechanism to the life sciences community.
Citation:
Stefan Dydel, Krzysztof Benedyczak, Piotr Bala, "Enabling Reconfigurable Hardware Accelerators for the Grid," parelec, pp.145-152, International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06), 2006
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