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International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06)
Distributed Optimization of Temperature Field for Reliable Construction of Electronic Circuits
Bialystok, Poland
September 13-September 17
ISBN: 0-7695-2554-7
ASCII Text
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Boguslaw Butrylo, "Distributed Optimization of Temperature Field for Reliable Construction of Electronic Circuits," Parallel Computing in Electrical Engineering, International Conference on, pp. 470-476, International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06), 2006.
 
 
BibTex
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@article{ 10.1109/PARELEC.2006.31,
author = {Boguslaw Butrylo},
title = {Distributed Optimization of Temperature Field for Reliable Construction of Electronic Circuits},
journal ={Parallel Computing in Electrical Engineering, International Conference on},
volume = {0},
year = {2006},
isbn = {0-7695-2554-7},
pages = {470-476},
doi = {http://doi.ieeecomputersociety.org/10.1109/PARELEC.2006.31},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Computing in Electrical Engineering, International Conference on
TI - Distributed Optimization of Temperature Field for Reliable Construction of Electronic Circuits
SN - 0-7695-2554-7
SP470
EP476
A1 - Boguslaw Butrylo,
PY - 2006
KW - null
VL - 0
JA - Parallel Computing in Electrical Engineering, International Conference on
ER -
 
Boguslaw Butrylo, Bialystok Technical University, Poland
Sequential and distributed implementations of optimization algorithm are validated and applied for the optimization of the temperature field distribution in an electronic circuits. The approximated, analytical solution of heat transfer equation is implemented to determine the temperature distribution in the circuit. The genetic algorithm is applied in the computations of the optimal displacement of the components in the circuit. Three different methods of the task and/or domain partitioning in the distributed algorithm are discussed.
Citation:
Boguslaw Butrylo, "Distributed Optimization of Temperature Field for Reliable Construction of Electronic Circuits," parelec, pp.470-476, International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06), 2006
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