A Two-Level Approach to Building a Campus Grid

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	Similar Articles Articles by Adam Kozakiewicz Articles by Andrzej Karbowski

International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06)

Bialystok, Poland

September 13-September 17

ISBN: 0-7695-2554-7

	ASCII Text	x
	Adam Kozakiewicz, Andrzej Karbowski, "A Two-Level Approach to Building a Campus Grid," Parallel Computing in Electrical Engineering, International Conference on, pp. 121-126, International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06), 2006.

	BibTex	x
	@article{ 10.1109/PARELEC.2006.11, author = {Adam Kozakiewicz and Andrzej Karbowski}, title = {A Two-Level Approach to Building a Campus Grid}, journal ={Parallel Computing in Electrical Engineering, International Conference on}, volume = {0}, year = {2006}, isbn = {0-7695-2554-7}, pages = {121-126}, doi = {http://doi.ieeecomputersociety.org/10.1109/PARELEC.2006.11}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel Computing in Electrical Engineering, International Conference on TI - A Two-Level Approach to Building a Campus Grid SN - 0-7695-2554-7 SP121 EP126 A1 - Adam Kozakiewicz, A1 - Andrzej Karbowski, PY - 2006 KW - null VL - 0 JA - Parallel Computing in Electrical Engineering, International Conference on ER -

Adam Kozakiewicz, NASK, Poland

Andrzej Karbowski, Warsaw University of Technology, Poland

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PARELEC.2006.11

The article proposes a two-layered system for distributed computation. The setup combines two different tools - Globus and Mosix - in order to harness the computing power wasted in unused student laboratories. The system is easy to set up and use. We present the results of experiments on a simple testbed, using the Google PageRank Algorithm as an example task.

Citation:

Adam Kozakiewicz, Andrzej Karbowski, "A Two-Level Approach to Building a Campus Grid," parelec, pp.121-126, International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06), 2006

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