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16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)
Brasov, Romania
September 15-September 19
ISBN: 0-7695-2944-5
ASCII Text
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Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, Sule Ozev, "Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation," Parallel Architectures and Compilation Techniques, International Conference on, pp. 424, 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), 2007.
 
 
BibTex
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@article{ 10.1109/PACT.2007.59,
author = {Bogdan F. Romanescu and Michael E. Bauer and Daniel J. Sorin and Sule Ozev},
title = {Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation},
journal ={Parallel Architectures and Compilation Techniques, International Conference on},
volume = {0},
year = {2007},
issn = {1089-795X},
pages = {424},
doi = {http://doi.ieeecomputersociety.org/10.1109/PACT.2007.59},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Parallel Architectures and Compilation Techniques, International Conference on
TI - Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation
SN - 1089-795X
SP
EP
A1 - Bogdan F. Romanescu,
A1 - Michael E. Bauer,
A1 - Daniel J. Sorin,
A1 - Sule Ozev,
PY - 2007
KW - null
VL - 0
JA - Parallel Architectures and Compilation Techniques, International Conference on
ER -
 
Bogdan F. Romanescu, Duke University
Michael E. Bauer, Duke University
Daniel J. Sorin, Duke University
Sule Ozev, Duke University
A major problem facing the computer and semi-conductor industries is the increasing amount of CMOS process variability [1, 3]. Variability in low-level circuit parameters, such as transistor gate length and gate oxide thickness, complicates system design by introducing uncertainty about how a fabricated system will perform. Although a circuit or chip is designed to run at a nominal clock frequency, the fabricated implementation may vary far from this expected performance.
Citation:
Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, Sule Ozev, "Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation," pact, pp.424, 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), 2007
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