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16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)
Automatic Correction of Loop Transformations
Brasov, Romania
September 15-September 19
ISBN: 0-7695-2944-5
Nicolas Vasilache, INRIA, Paris-Sud 11 University, France
Albert Cohen, INRIA, Paris-Sud 11 University, France
Louis-Noel Pouchet, INRIA, Paris-Sud 11 University, France
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profitability of sequences of transformations to enhance parallelism, locality, and resource usage, which amounts to a hard problem on a non-linear objective function; (2) the construction and exploration of search space of legal transformation sequences. Practical optimizing and parallelizing compilers decouple these tasks, resorting to a predefined set of enabling transformations to eliminate all sorts of optimization-limiting semantical constraints. State-of-the-art optimization heuristics face a hard decision problem on the selection of enabling transformations only remotely related to performance.

We propose a new design where optimization heuristics first address the main performance anomalies, then correct potentially illegal loop transformations a posteriori, attempting to minimize the performance impact of the necessary adjustments. We propose a general method to correct any sequence of loop transformations through a combination of loop shifting, code motion and index-set splitting. Sequences of transformations are modeled by compositions of geometric transformations on multidimensional affine schedules. We provide experimental evidence of the scalability of the algorithms on real loop optimizations.

Citation:
Nicolas Vasilache, Albert Cohen, Louis-Noel Pouchet, "Automatic Correction of Loop Transformations," pact, pp.292-304, 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), 2007
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