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First International Symposium on Networks-on-Chip (NOCS'07)
Princeton, New Jersey
May 07-May 09
ISBN: 0-7695-2773-6
Xuan-Tu Tran, CEA-LETI, France
Jean Durupt, CEA-LETI, France
Yvain Thonnart, CEA-LETI, France
Francois Bertrand, CEA-LETI, France
Vincent Beroulle, INPG-LCIS, France
Chantal Robach, INPG-LCIS, France
The Network-on-Chip (NoC) paradigm has recently emerged as an alternative solution for on-chip communications of the next System-on-Chip (SoC) generation. The advantages of NoC-based systems are numerous: high scalability and versatility, high throughput with good power efficiency,. . . The NoC distributed communication architecture is perfectly adapted to the Globally Asynchronous Locally Synchronous (GALS) platforms where the NoC nodes and links are implemented using asynchronous logic while the computational resources (i.e., IPs) are implemented with standard synchronous design methodologies.
Citation:
Xuan-Tu Tran, Jean Durupt, Yvain Thonnart, Francois Bertrand, Vincent Beroulle, Chantal Robach, "Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip," nocs, pp.216, First International Symposium on Networks-on-Chip (NOCS'07), 2007
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