1998 Midwest Symposium on Systems and Circuits
Design of a Modulator ASIC for Wide Band CDMA Wireless Local Loop System
South Bend, Indiana
August 09-August 12
ISBN: 0-8186-8914-5
In this paper, we present the design and implementation of modulator ASIC in direct sequence code division multiple access(DS-CDMA) Wireless Local Loop(WLL) System. Here we just consider the issues of design and implementation of channel in the forward link. We proposed a new base band filter structure reducing hardware size to one of half of conventional circuits. The modulator ASIC is composed of four channels which include channel coding, block interleaving, pseudonoise (PN) spreading, and four baseband filters. The ASIC is fabricated using 0.6mm CMOS process with 40k gates and is operated at 32MHz. The implemented ASIC is successfully tested on WLL test-bed system.
Citation:
Jae H. Lee, Young J. Bahg, Kyoung R. Cho, "Design of a Modulator ASIC for Wide Band CDMA Wireless Local Loop System," mwscas, pp.596, 1998 Midwest Symposium on Systems and Circuits, 1998